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Exploiting zSeries Hardware


This course explains two important concepts that are dependant on zSeries hardware features. The advent of Parallel Sysplex architecture and its supporting components within MVS have made the zSeries platform extremely resilient and scalable. In addition to this, the concept of the LPAR has been extended by the Intelligent Resource Director, allowing the power of the zSeries features to be directed to where it is most needed. This course covers both of these concepts explaining what they are and how they can be best exploited.
 

What the students say:

Happy with everything 

Systems Programmer, Royal London Group


Course outline

Objectives

On successful completion of this course, attendees will be able to:

  • explain the concept of Sysplex
  • describe the XCF function for connecting the systems
  • explain how Data Sharing works
  • describe Sysplex management
  • explain what the IRD does
  • exploit WLM LPAR CPU management
  • exploit Dynamic Channel-path management
  • exploit CSS I/O priority management.

Who Should Attend

The course is intended for all technical support personnel, including systems programmers, senior operations staff and their managers. It would also be beneficial to anyone interested in learning about Parallel Sysplex and the z/OS and MVS features.

Prerequisites

Familiarity with z/OS structure, concepts, operation and workload.

Duration

2 days

Course Code

MZHW

 

Contents

Sysplex introduction
What is SYSPLEX ?; XCF; Sysplex Timer; Sysplex Services; Sysplex Exploitation.


XCF
XCF and signaling; XCF Groups and Members; cross-system access; status monitoring;


Data sharing
The Coupling Facility and how it works; 9674; CF in LPAR; ICF; Coupling Facility channels; CFC types; structures and their use.


Sysplex management
CFRM; the WLM; WLM policies, controls, operating modes.


Introduction to Intelligent Resource Director (IRD)


WLM LPAR CPU Management
How WLM LPAR CPU Management works; planning for WLM LPAR CPU Management; implementing WLM LPAR CPU Management; Operating WLM LPAR CPU Management; Performance and tuning for WLM CPU Management.


Introduction to Dynamic Channel-path Management
Explain how Dynamic Channel-path Management works.


Channel Subsystem I/O Priority Queueing
Planning & implementing CSS I/O Priority Management.


 

   

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